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specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 80807 ms pc b8-9096 no.a0879-1/21 LB11691 overview the LB11691 are three- phase bipolar pwm drive pre-driver ics that allo w the output circuits to be implemented using only n-channel fets. these ics can implement, at low cost, high -efficiency drive circuits in applications that use motors that require high drive currents. these ics include a built-in hall sensor signal f/v conversion circuit and can provide a voltage that is proportional to motor speed for use, for exam ple, in speedometers for elect ric bicycles. these ics also support use in applications that holds the speed c ontrolled at a constant rate as the load varies. features ? three-phase bipolar pwm drive (high and low side n-channel fet drive) ? maximum supply voltage : 45v ? gate drive voltage : about 10v (high and low side n-channel fets) ? hall sensor signal f/v conversion circuit (one-shot multivibrator output) ? synthesized three-phase hall sensor signal output ? built-in current limiter and undervoltage protection circuits specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage 1 v cc max v cc pin 45 v supply voltage 2 vb max vb pin 60 v output current 1-1 i o max1 ul, vl, and wl pins 50 ma output current 2-1 i o max2-1 uh, vh, and wh pins sink current 30 ma output current 2-2 i o max2-2 uh, vh, and wh pins source current 40 ma rf pin application voltage vrf max 4v lvs pin application voltage vlvs max 60 v continued on next page. monolithic digital ic pre-driver ic for brushless moto r drive in electric bic y cles orderin g numbe r : ena0879
LB11691 no.a0879-2/21 continued from preceding page. parameter symbol conditions ratings unit in pin application voltage v in max in1, in2, and in3 pins v5+0.3 v res pin application voltage vres max v5+0.3 v toc pin application voltage vtoc max v5+0.3 v hsel pin application voltage vhsel max v5+0.3 v f/r pin application voltage vfr max v5+0.3 v ei+ pin application voltage vei + max v5+0.3 v ei- pin application voltage vei - max v5+0.3 v rc pin application voltage vrc max v5+0.3 v fv pin application voltage vfv max v5+0.3 v hp pin application voltage vhp max 45 v fail pin application voltage vfail max 45 v allowable power dissipation 1 pd max1 independent ic 1.5 w allowable power dissipation 2 pd max2 mounted on a board. * 2.55 w operating temperature topr -20 to +100 c storage temperature tstg -55 to +150 c * mounted on a substrate : 114.3 76.1 1.6mm 3 , glass epoxy board. allowable operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage range 1 v cc v cc pin 15 to 42 v supply voltage range 2 vb vb pin v cc +13 v output current 1-1 i out 1-1 ul, vl, and wl pins sink current 45 ma output current 1-2 i out 1-2 ul, vl, and wl pins source current -45 ma output current 2-1 i out 2-1 uh, vh, and wh pins sink current 25 ma output current 2-2 i out 2-2 uh, vh, and wh pins source current -35 ma 12v constant-voltage output current i 12reg -30 ma 5v constant-voltage output current i 5reg -30 ma hp pin application voltage v hp 0 to 42 v hp pin output current i hp 0 to 5 ma fail pin application voltage vfail 0 to 42 v fail pin output current ifail 0 to 5 ma electrical characteristics ta = 25 c, v cc = 36v ratings parameter symbol conditions min typ max unit source current i cc 19 24 ma 5v constant-voltage output (v5 pin) output voltage v 5reg i o = -5ma 4.7 5.0 5.3 v voltage fluctuation v 5reg1 v cc = 15 to 42v 40 100 mv load fluctuation v 5reg2 i o = -5 to -30ma 10 30 mv temperature coefficient v 5reg3 design target value * 0 mv/ c 12 v constant-voltage output (v12 pin) output voltage v 12reg i o = -5ma 11.2 12.0 12.8 v voltage fluctuation v 12reg1 v cc = 15 to 42v 120 240 mv load fluctuation v 12reg2 i o = -5 to -30ma 10 30 mv temperature coefficient v 12reg3 design target value * 0 mv/ c output block/conditions : u out = v out = w out = 18v, vb = 48v applied output h-level voltage 1 v oh 1 ul, vl, and wl pins i oh = -10ma v12-1.2 v12-0.8 v output l-level voltage 1 v ol 1 ul, vl, and wl pins i ol = 10ma 0.8 1.2 v output h-level voltage 2 v oh 2 uh, vh, and wh pins i oh = -5ma 46.8 47.2 v output l-level voltage 2 v ol 2 uh, vh, and wh pins i oh = 5ma 18.2 18.6 v * : design target values and not tested. continued on next page.
LB11691 no.a0879-3/21 continued from preceding page. ratings parameter symbol conditions min typ max unit charge pump output (vb pin) output voltage vb out 46.0 48.0 50.5 v cp1 pin output h-level voltage v oh (cp1) icp1 = -2ma v cc -1.9 v cc -1.4 v output l-level voltage v ol (cp1) icp1 = 2ma 1.5 2.0 v integrating amplifier input offset voltage vio (cont) -10 10 mv input bias current ib (cont) -1 1 a common-phase input voltage range vicm 0 v5-1.7 v output h-level voltage v oh (cont) itoc = -0.2ma v5-1.1 v5-0.8 v output l-level voltage v ol (cont) itoc = 0.2ma 0.8 1.1 v open loop gain f (cont) = 1khz 45 51 db pwm oscillator (pwm pin) output h-level voltage v oh (pwm) 2.75 3.0 3.25 v output l-level voltage v ol (pwm) 1.0 1.2 1.3 v external c charge current ichg vpwm = 2.1v -35 -25 -19 a oscillation frequency f (pwm) c = 270pf 29 36 44 khz amplitude v (pwm) 1.6 1.8 2.1 vp-p toc pin input voltage 1 vtoc1 outp ut duty 100% 2.72 3.0 3.30 v input voltage 2 vtoc2 outp ut duty 0% 0.99 1.2 1.34 v input voltage 1l vtoc1l design target va lue*, 100% at v5 = 4.7v 2.72 2.80 2.90 v input voltage 2l vtoc2l design target va lue*, 0% at v5 = 4.7v 0.99 1.08 1.17 v input voltage 1h vtoc1h design target value*, 100% at v5 = 5.3v 3.08 3.20 3.30 v input voltage 2h vtoc2h de sign target value*, 0% at v5 = 5.3v 1.11 1.22 1.34 v current limiting circuit (rf pin) limiter voltage vrf 85 100 115 mv low-voltage protective circuit (lvs pin) operating voltage vsd l 3.65 3.85 4.05 v cancellation voltage vsdh 4.15 4.35 4.55 v hysteresis width vsd 0.35 0.5 0.65 v heat shielding operation (overheat protection circuit) heat shielding operation temperature tsd design target value* (junction temperature) 150 170 c hysteresis width tsd design target value* (junction temperature) 40 c csd circuit (csd pin) output h-level voltage v oh (csd) 3.2 3.6 4.0 v output l-level voltage v ol (csd) 0.9 1.1 1.3 v external c charge current ichg1 vcsd = 2.35v -14 -10 -6 a external c discharge current ichg2 vcsd = 2.35v 7 11 15 a oscillation frequency f (csd) c = 0.01 f 180 hz amplitude v (csd) 2.2 2.5 2.75 vp-p reset circuit (res pin) reset operating voltage vr esl 1.17 1.27 1.37 v reset canceling voltage vresh 1.37 1.5 1.63 v hysteresis width vres 0.20 0.23 0.26 v hp pin output saturation voltage vhpl i o = 3ma 0.15 0.5 v output leak current ihp leak vhp = 42v 10 a * : design target values and not tested. continued on next page.
LB11691 no.a0879-4/21 continued from preceding page. ratings parameter symbol conditions min typ max unit fail pin output saturation voltage vfll i o = 3ma 0.15 0.5 v output leak current ifl leak vfail = 42v 10 a rc pin output h-level voltage v oh (rc) 3.22 3.5 3.78 v output l-level voltage v ol (rc) 0.72 0.8 0.88 v clamp voltage vclp (rc) 1.5 v fv pin charge current ichg1 vfv = 2.5v -420 -300 -230 a discharge current ichg2 vfv = 1v 1.3 2.5 5.0 ma in1, in2, and in3 pins h-level input voltage v ih (in) 4.0 v5 v l-level input voltage v il (in) 0 2.5 v input open voltage v io (in) v5-0.5 v5 v hysteresis width v is (in) 0.55 0.9 1.25 v h-level input current i ih (in) v in = v5 -10 0 10 a l-level input current i il (in) v in = 0v -500 a f/r pin h-level input voltage v ih (fr) 2.0 v5 v l-level input voltage v il (fr) 0 1.0 v input open voltage v io (fr) 2.6 2.9 3.2 v hysteresis width v is (fr) 0.16 0.25 0.34 v h-level input current i ih (fr) vf/r = v5 100 130 a l-level input current i il (fr) vf/r = 0v -170 -130 a hsel pin h-level input voltage v ih (hsl) 2.0 v5 v l-level input voltage v il (hsl) 0 1.0 v input open voltage v io (hsl) 2.6 2.9 3.2 v h-level input current i ih (hsl) vhsel = v5 100 130 a l-level input current i il (hsl) vhsel = 0v -170 -130 a package dimensions unit : mm (typ) 3170a sanyo : dip36s(400mil) 3.95max (3.25) 0.51min 3.0 32.4 8.6 0.95 0.25 (1.1) 1.78 0.48 10.16 118 36 19 pd max -- ta ambient temperature, ta ? c allowable power dissipation, pd max ? w 0 2.0 2.5 1.5 1.0 0.5 3.0 ? 20 80 100 60 20 2.55w 1.02 0.60 1.5w 40 012 0 mounted on a board : 114.3 76.1 1.6mm 3 glass epoxy independent ic
LB11691 no.a0879-5/21 three-phase logic truth table (1)120 (hsel = ?l?) f/r = ?l? f/r = ?h? in1 in2 in3 in1 in2 in3 upper side gate lower side gate hp 1 h l h l h l vh ul h 2 h l l l h h wh ul l 3 h h l l l h wh vl h 4 l h l h l h uh vl l 5 l h h h l l uh wl h 6 l l h h h l vh wl l (2)60 (hsel = ?h?) f/r = ?l? f/r = ?h? in1 in2 in3 in1 in2 in3 upper side gate lower side gate hp 1 h h h l l l vh ul h 2 l h h h l l wh ul l 3 l l h h h l wh vl h 4 l l l h h h uh vl l 5 h l l l h h uh wl h 6 h h l l l h vh wl l ? the condition with the upper gate = vh and the lower gate = ul corresponds to a state in which the upper fet is turned on when the vh pin is conn ected and the lower fet is turned on when the ul pin is connected. ? the hp output is an open collector output. therefore, ?h? level corresponds to an open state. pin assignment 19 rc 20 csd 21 fail 22 hp 23 cp2 24 cp1 25 lvs 26 v5 27 v12 28 v cc 29 vb 30 gnd 31 rfgnd 32 rf 33 (nc) 34 wl 35 w out 36 wh 18 fv 17 pwm 16 toc 15 ei - 14 ei + 13 (nc) 12 f/r 11 hsel 10 res top view 9 in3 8 in2 7 in1 6 uh 5 u out 4 ul 3 vh 2 v out 1 vl LB11691
LB11691 no.a0879-6/21 pin functions pin no. pin name description 1 4 34 vl ul wl lower nch power fet gate drive output pins. 2 5 35 vout uout wout upper nch power fet source voltage detection pins. 3 6 36 vh uh wh upper nch power fet gate drive output pin. 7 8 9 in1 in2 in3 hall input pins. a capacitor is connected for stabilization between these pins and gnd. 10 res reset pin. a resistor is connected between this pin and v5 while a capacitor is connec ted between this pin and gnd. 11 hsel reset pin. connect the resistance between this pin and v5 and the capacitor between this pin and gnd. 12 f/r pin for changeover of the phase difference of three-phase hall input (120 and 60). hsel = ?l? 120, hsel = ?h? 60 14 ei + integrating amplifier non-inverted input pin. 15 ei - integrating amplifier inverted input pin. 16 toc pwm waveform comparison pin (integrating amplifier output pin). 17 pwm pwm oscillation frequency set pin. connect a capacitor between this pin and gnd. 18 fv hall signal one-shot multi-pulse output. 19 rc one-shot multi-pulse width set pin. a resistor is connected between this pin and v5 while a capacitor is connected betwee n this pin and gnd. 20 csd pin to set the operation time of the lock protection circuit. connect the capacitor between this pin and gnd. 21 fail open collector output, with the output being ?l? in following cases : abnormal hall input, activation of the low-voltage protection circ uit, activation of the lock protection circuit, and activatio n of the overheat protection circuit. 22 hp hall signal three-phase composite output pin (open collector output). 23 24 cp2 cp1 charge pump capacitor output pin. a capacitor is connected between cp1 and cp2. 25 lvs low-voltage protective voltage detection pin. a zener diod e is connected in series to set the detection voltage when the supply voltage of 5v or more is to be detected. 26 v5 5v power pin (control circuit power supply). a capacitor is connected between this pin and gnd. 27 v12 12v power pin (ul, vl, and wl output power supply). a capacitor is connected between this pin and gnd. 28 v cc power pin. a capacitor is connected fo r stabilization between this pin and gnd. 29 vb charge pump output pins (uh, vh, and wh output power supply). a capacitor is connected between this pin and v cc . 30 gnd gnd pin. 31 rfgnd gnd sensing pin, which is connected to the gnd side of low-resistance rf connected to the rf pin. 32 rf output current detection pin. low-resi stance rf is connected between rf and gnd. the output current is limited to the value set with i out = 0.1/rf. (current limiting circuit) 13 33 nc these can be used as wiring because they are not connected with the internal parts.
LB11691 no.a0879-7/21 pin description pin no. pin name description equivalent circuit 1 4 34 vl ul wl output pin (gate driving output pin of lower nch power fet) for duty control 2 5 35 vout uout wout voltage detection pin (source voltage detection pin of upper nch power fet) 3 6 36 vh uh wh output pin (gate driving output pin of lower nch power fet) 7 8 9 in1 in2 in3 hall input pin ?h? in the open condition. connect a capacitor to gnd for stabilization. 10 res reset pin 11 hsel pin to change over the phase difference of three-phase hall input hsel = ?l? 120 hsel = ?h? 60 continued on next page. 50k v12 1 4 34 50k vb 3 6 36 2 5 35 8k 2k 10k v5 7 8 9 300 lvsd v5 10 30k 40k 5k v5 11
LB11691 no.a0879-8/21 continued from preceding page. pin no. pin name description equivalent circuit 12 f/r forward/backward input pin 14 ei + integrating amplifier non-inverted input pin 15 ei - integrating amplifier inverted input pin 16 toc integrating amplifier output pin (pwm waveform comparison pin) 17 pwm pin to set the pwm oscillation frequency. connect a capacitor between this pin and gnd. 18 fv hall signal one-shot multi-pulse output pin continued on next page. 30k 40k 5k v5 12 res v5 300 300 15 14 40k v5 300 16 v5 300 7.5k 17 300 v5 18
LB11691 no.a0879-9/21 continued from preceding page. pin no. pin name description equivalent circuit 19 rc one-shot multi-pulse width setting pin connect a resistor between this pin and v5 and a capacitor between this pin and gnd. 20 csd pin to set the pwm oscillation frequency. connect a capacitor between this pin and gnd. 21 fail open collector output, with the output being ?l? in following cases : abnormal hall input, activation of the low-voltage protection circuit, activation of the lock protection circuit, and activation of the overheat protection circuit 22 hp hall signal three-phase composite output pin (open collector output) 23 cp2 24 cp1 charge pump capacitor connection pin connect a capacitor between cp1 and cp2. continued on next page. 21 v5 22 v5 vb v cc 300 50 23 300 24 v cc 300 v5 19 300 v5 20
LB11691 no.a0879-10/21 continued from preceding page. pin no. pin name description equivalent circuit 25 lvs low-voltage protective voltage detection pin when the 5v or more supply voltage is to be detected, connect zener diode in series and set the detection voltage. 26 v5 stabilization power supply output pin (5v output) connect a capacitor (about 0.1 f) between this pin and gnd for stabilization 27 v12 stabilization power supply output pin (12v output) connect a capacitor (about 0.1 f) between this pin and gnd for stabilization. 28 v cc power pin connect a capacitor (about 0.1 f) between this pin and gnd for stabilization 29 vb charge pump output pin (uh, vh, and wh output power supply) connect a capacitor between this pin and v cc . 30 gnd gnd pin 31 rf gnd connected to gnd of external rf resistor. continued on next page. 18k 46k v5 25 v cc 38k 50 12.5k 26 v cc 110k 50 12.5k 27 v5 31
LB11691 no.a0879-11/21 continued from preceding page. pin no. pin name description equivalent circuit 32 rf output current detection pin. connect the low resistance rf between this pin and gnd. set with the output maximum current i out = 0.1/rf. 13 33 nc these can be used as wiring because they are not connected with the internal parts. v5 32
LB11691 no.a0879-12/21 description of LB11691 1. output drive circuit this ic is designed on the prerequisite that nchfet is used for both upper and lower outputs. to minimize power loss at the output, the direct pwm drive method is used. output tr is normally saturated at on and the motor drive power is adjusted by changing the on-duty of the output. pwm switching of the output is made on the lower output side to which ul, vl, and wl pins are connected. diode built into the upper output fet on the non-pwm side should be selected with care because the reverse recovery time is im portant (the through current flows in an instant when the pwm side tr is turned on if the diode with the short reverse recovery time is not used). near each three-phase output fet, provide a capac itor to prevent high-frequency oscillation (about 0.1 f) because of substrate pattern routing. if the switching speed of fet is so high as to cause a problem, insert a series resistor to the gate to ad just the speed. th rough current may flow if the on speed of lower fet on the pwm side is too fast. however, insertion of excessively large resistor in the gate may make the gate waveform dull and the gate voltage may be deficient when the pwm on-duty is small, resulting in heat generation or damage of the lower fet. the same phenomena occur if the fet gate capacity is large even when the resistor has not been inserted. in this case, it is necessary to limit the minimum duty to be used by taking into account aso of the switching element to be used. depending on fet to be used, the through current may flow when the pwm on-duty is sma ll. as a countermeasure, a capacitor may be inserted between the gate and source of upper fet. note that in sertion of a capacito r with excessively high capacitance may delay switching too much, resulting in heat generation in the upper fet. 2. current limiting circuit the current limiting circuit limits the current to the value determined by i = vrf/rf (vrf = 0.1vtyp, rf : current detection resistance) (that is, the peak current is limited). current is limited by decreasing on-duty of the output. connection of rf and rfgnd pins to bo th ends near the current detection resistor ensures operation with the correct current limiting value. when the current detection resistor with extremely small resistance is to be used, the pattern design must be such as to ensure the equal wiring resistance component by substrate pattern for all phases as much as possible. if the wiring resistance component varies among phases, the current limit value fluctuates each time the shift is changed, resulting in vibration or noise in the motor. the reference voltage has been set to 0.1vtyp to minimize the power of current detection resistor. in certain applications, enter the voltage divided by the resistor into rf pin when the current detection resistance is to be increased. for the resistance ratio shown in the figure right, the detection current value may be increased by about four times. the current limiting circuit has a filter circ uit so that erroneous current limiting is not made when the circuit detects the reverse recovery current of the output diode because of pwm operation. in the normal application, the internal filter circuit is allowed. if erroneous limiting occurs (i f the reverse recovery current of diode flows for 1 s or more), it is necessary to add the external filter circuit (r and c low-path filter). note also that excessive delay may cause delay in detection of current limiting. 3. pwm oscillation circuit the pwm frequency is determined from a capacitor capacity c (f) to be connected to the pwm pin : fpwm 1/ (102000c) connection of a 270pf capacitor causes oscillation of about 36khz. excessively low pwm frequency causes a switching sound from the motor while excessively high pwm frequency causes increase in the power loss at output. therefore, the pwm frequency of about 20k to 50khz would be acceptable. wire gnd of a capacitor to be connected as much near as possible to the gnd pin of ic to prevent effects of output noise. to v cc uh pin to motor coil to rf uout pin ul pin means against through current for oscillation prevention rfgnd pin 1k 3k rf pin current detectiom resistor rfgnd pin rf pin current detectiom resistor
LB11691 no.a0879-13/21 4. control method the output duty is determined from comparison between the pwm oscillation waveform and toc pin voltage. the duty becomes 0% when the toc pin voltage is about 1.2v or less and 100% when the pin voltage is about 3.0v or more. normally, the integrating amplifier is used as a full return amplifier (ei - pin and toc pin connected) and the control voltage is entered to ei + pin. (the output duty increases with increasing ei + pin voltage.) at resetting with the res pin, the ei + pin is lowered approximately to the gnd voltage by ic internal tr (for capacitor discharge). therefore, always enter the voltage via resistor, instead of direct connectio n of the low-impedance power. also connect a pull-down resistor between the ei + pin and gnd to prevent the motor from being driven when the control voltage is open. when the control voltage contains noise or in order to suppress sudden fluctuation of the control voltage, connect a capacitor between the ei + pin and gnd to remove the noise. the operating voltage range of control input can be widened by entering the voltage divided by the resistor into the ei + pin, as shown in the figure right. to perform control while keeping the rotation speed constant to a certain degree under load fluctuation, the speed control circuit with fv pin output may be formed as shown in the right. select a 25k or more resistance to be inserted between fv and ei - pins. select the return capacitor capacity so that the toc pin voltage is sufficiently stable at low speed. 5. charge pump circuit the voltage is raised by the charge pump circuit, generating th e gate voltage of upper output fet. the voltage is raised by a capacitor cp connected between cp1 and cp2 pins, a ccumulating the charge in th e capacitor cb between vb and v cc pins. the capacitance value of cp and cb must always have the following relationship : cb 4 cp cp capacitor charge and discharge are made on the basis of pwm cycle. though the vb po wer supply current capacity increases with increasing capacity of the cp capacitor, excessively large capacity may cause faulty charge/discharge operation. the vb voltage becomes more stable when the cb capacitor capacity is larger, but excessively large capacity causes longer time of vb voltage generation at a time of power on. set the capacity of cp and cb by referring to the table below. when the v cc voltage decreases below 20v, the current capacity of vb power supply deteriorates suddenly, causing drop of vb voltage. therefore, due care must be taken when designing. v cc voltage 24v 36v cp 0.1 f 6800pf cb 1 f 0.47 f 6. hall input signal connect the hall ic output to the hall input. as an about 10k pull-up resistor is incorporated for the 5v regulator, it is normally not necessary to connect the pull-up resistor externally. if the hall ic with built-in pull-up resistor is used, it is enough to use the hall ic power supply with 5v. if the hall ic power supply is to be used w ith 12v, it is necessary to add the pull-down resistor or voltage clamp zener diode to prevent application of voltage of 5v or more to the hall input. the input is a comparator input with about 0.9v hysteresis width. if the noise presents problem, connect a noise removing capacitor between the input and gnd. when three inputs of hall input signal are in the same input condition, both upper and lower outputs are turned off. + - to fv pin toc ei - ei + control voltage control voltage + - toc ei - ei + hall ic 12v 5v in LB11691
LB11691 no.a0879-14/21 7. low-voltage protective circuit the low-voltage protective circuit performs detection using the voltage applied to the lvs pin and turns off all drive outputs when the voltage drops below the operating voltage (3 .85vtyp). the circuit has hysteresis to prevent repetition of on/off near the protected operating voltage. the output is not recovered when the voltage does not rise by about 0.5v above the operating voltage. in the protection operation, the res pin voltage becomes ?l? too. the protection operating voltage is based on the 5v system detection level. to raise the detection level, connect zener diode in series to the lvs pin and shift the detection level (detection voltage = 3.85vtyp+vz). the lvs pin inrush current at detection is about 62 a. if it is necessary to stabilize rise of the zener diode voltage and to suppress fluctuation of the zener voltage, insert a resistor between lvs pin and gnd to increase the diode current. the detection voltage may also be raised, without using zener diode, by resistive potential division. when connection as shown in the right is made ; detection voltage ((3.85 r2) + 62 a) (r1+r2) cancellation voltage ((4.35 r2) + 70 a) (r1+r2) with r1 = 13k and r2 = 2.2k , the detection voltage becomes about 28v while the cancellation voltage becomes about 32v. pay due attention when raising r2 because the error of detection voltage may increas e because of temperature and variance. when the protective circuit is not to be used, do not open the lvs pin (output off when this is opened) and apply the voltage on an inoperative level. 8. res circuit apply initial reset with the res pin to ensure stable operation at power on. initial reset includes the following operations : ? all drive outputs off ? ei + pin voltage at ?l? ? fv pin voltage at ?l? normally, connect a resistor and capacito r between res and v5 pins and between these pins and gnd respectively and set the reset time. use a 2.7k or more resistor. set so that the time constant becomes r c 1m (0.1 f or more if this is 10k ). if the charge of a capacitor connected to ei + or fv pin must be completely discharged, set the reset time by taking into account the disc harge time of these pins. it is also recommended to set the reset time longer than the time necessary for stabilization of the vb voltage at power on. in addition to initial reset, reset may be applied when the control voltage is low as shown in fig. 1 in the right. in this case, all drive outputs can be turned off when the control voltage becomes about 0.67v(1.27v - v be ). the reset cancellation voltage is about 0.9v (0.67v+0.23v). if only the control voltage is 0% duty (1.2v or less), the motor is braked when driven in the reverse direction. this is an effective application when braking is not necessary during reverse drive. if the control voltage cannot be decreased to 1v or less, application as shown in fig. 3 may be used. heat detection with thermistor may al so be considered to prevent thermal breakdown of output fet. connect as shown in fig. 2 in the right and adjust the external resistance, and the protective operation can be done. fig. 4 shows a combination of this application with thermi stor and an application shown in fig. 3. to v5 pin ei + pin res pin fig.1 fig.2 to control voltage to v5 pin res pin thermistor lvs pin r1 r2 to detectiom power supply to detectiom power supply lvs pin v z res 10k 47k ei + control voltage (1v to 4v) 10k 47k ei + res fig.4 fig.3 control voltage (1v to 4v) to v5 pin
LB11691 no.a0879-15/21 9. rc and fv circuits the rc pin is to set the pulse width (?h? time) generated in the fv pin for both edges of hp signal (hall three-phase composite signal). connect a resistor and capacitor between rs and ve pins and between this pin and gnd respectively and set the pulse width. the pulse width trc can be approximated by the following equation. trc (s) 1.1 r c connect the smoothing circuit comprising a resist or and capacitor, as shown in the right, to the fv pin. select the 25k or more resistor. the capacitor must have the capacitance ensuring sufficient smoothing of fv voltage when the motor rotation speed is low. assume that the hp signal frequency at th e maximum motor speed is fhp (hz). set so that the following equation is established : trc (s) 1 (2 fhp) in this case, the fv voltage changes from 0 to about 5v according to the motor speed. the fv voltage can be used as a signal fo r speed meter indication of analog or level meter ic or speed return. if fv output is not to be used, connect the rc pin to gnd and keep the fv pin open. 10. power stabilization this ic is of a switching drive type, cau sing a state in which the power line is read ily displaced. it is therefore necessary to connect the capacitor with sufficient capacity between the v cc pin and gnd for stabilization. when a diode is to be inserted into the power line to prevent breakdown due to reverse connection of power supply, the power line tends to be displaced readily. it is th erefore necessary to select the larger capacity. 11. stabilizing the regulator output voltage connect the cap acitor of 0.1 f or more between v5 pin (5v : control circuit power supply) or v12 pin (12v : lower drive output circuit power supply) and gnd. wire the capacitor gnd as ne ar to ic gnd pin as possible. each output can output the current of 30ma or less to the outside of ic. due care must be taken however because ic heat generation increases. if this is used in the hall ic power supply and presents a problem of heat generation, connect tr as shown in the right so that tr receives heat generation. 12. lock protection circuit the lock protection circuit is incorpor ated to protect ic and motor when the motor is locked. when the hall input signal is not changed over for a certain period while the motor is being driven, the output on one side (ul, vl, wl) is turned off. the time is set with the capacitor capacitance connected to the csd pin. set time (s) 30 c ( f) connection of the 0.01 f capacitor ensures the protection period of about 0.3 seconds (the drive is turned off when one cycle of hall input signal exceeds this set time). be sure to set the time with sufficient allowance, so that the protection circuit is not activated at normal motor startup. for the capacitor, use 4700pf or more. to cancel the lock protection state, take any one of following steps : ? resetting, ? maintaining the output duty 0% state by toc input for the period of tcsd 2, ? re-applying the power. 13. forward/backward operation for forward/backward changeover during running, the measure is taken to prevent through current at the output (through current caused by the output tr off delay time at a time of changeover). however, changeover during running causes the current exceeding the current limit to flow through the output tr due to the motor coil resistance and motor counter electro-motive force. it is therefore necessary either to select th e external output tr that does not suffer breakage by this current or to design changeover with the motor speed reduced to a certain degree. 14. fail hall input the output becomes ?l? in following states with the open collector output : ? at abnormal hall input ? when the low-voltage protection circuit is activated ? when the lock protection circuit is activated ? when the overheat protection circuit is activated rc pin fv pin fv voltage to v5 pin v5 pin or v12 pin v cc hall ic power supply
LB11691 no.a0879-16/21 15. hsel phase difference (120 and 60 ) can be changed over for the three-phase hall input. ? hsel = ?l? 120 ? hsel = ?h? 60
LB11691 no.a0879-17/21 hall input ? each output timing chart (for three-phase hall input phase difference of 120 ) hall input in1 hsel = "l"120 , f/r = "l" in2 in3 ul vl wl uh vh wh hp t 1.1rc fv output indicates the pwm output pre output hall pulse output in1 hsel = "l"120 , f/r = "h" in2 in3 ul vl wl uh vh wh hp fv output hall input t 1.1rc indicates the pwm output pre output hall pulse output
LB11691 no.a0879-18/21 hall input ? each output timing chart (for three-phase hall input phase difference of 60 ) in1 hsel = "h"60 , f/r = "l" in2 in3 ul vl wl uh vh wh hp fv output hall input t 1.1rc indicates the pwm output pre output hall pulse output in1 hsel = "h"60 , f/r = "h" in2 in3 ul vl wl uh vh wh hp fv output hall input t 1.1rc indicates the pwm output pre output hall pulse output
LB11691 no.a0879-19/21 sample application circuit + - v12 zener diode 36v cp2 hp v5 rc v5 cp1 fv v cc vb lvs uh u out ul vh pre driver v out vl wh w out wl rf + + + - v5 curr lim hall hys comp hall logic control logic tsd 12vreg 5vreg hp lvsd pwm osc fail csd tsd lvsd invalid hall fail speed control thermistor res pwm toc ei - ei + res sd osc 60 /120 f/r csd v12 60 /120 f/r in1 in2 in3 gnd v5 rfgnd v cc one_shot multi charge pump
LB11691 no.a0879-20/21 sample application circuit sample application (closed loop speed control) + - v12 zener diode 36v cp2 hp v5 rc v5 cp1 fv v cc vb lvs uh u out ul vh pre driver v out vl wh w out wl rf + + + - v5 curr lim hall hys comp hall logic control logic tsd 12vreg 5vreg hp lvsd pwm osc fail csd tsd lvsd invalid hall fail speed control thermistor res pwm toc ei - ei + res sd osc f/r csd v12 f/r in1 in2 in3 gnd v5 rfgnd v cc one_shot multi charge pump 60 /120 60 /120
LB11691 ps no.a0879-21/21 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of august, 2007. specifications and information herein are subject to change without notice.

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